The invention relates in general to the use of high resolution microscopy for integrated circuit (IC) specimen probe stations, and particularly to methods and system for probing with electrical test signals on integrated circuit specimens using a scanning electron microscope (SEM) positioned for observing the surface indicia of the specimen identifying the electrically conductive terminals for the positioning of the probes.
Presently, probe stations typically employ optical microscopes. Although the diameters of wafers are getting larger, the structures constructed on and in those wafers are getting smaller. In the past several decades, the industry has driven the size of these structures from large sizes on the order of hundredths of an inch to small fractions of micrometers today. Until recently, most structures could be observed by normal high magnification light microscopes and probed. However, modern structures have now achieved a size that no longer allows viewing with standard light microscopes. With the industry integrated circuit design rules driving towards 0.18 micron features and smaller, most advanced optical light microscopes cannot be relied upon to accurately identify the electrically conductive terminals from the conductive path indicia of the surface of the integrated circuit specimens under test. Additionally, when viewing very small features on a specimen, the optical microscope lens often must be positioned so close to the specimen that it may interfere with the test probes.
Another approach is necessary in addition to optical microscopy if the industry is to continue to probe these structures, which is surely needed. It would be desirable therefore to provide a probe station which can visualize and probe features not typically visible under even the most advanced light microscope, that can be used in conjunction with electron optics while maintaining the features typically found on optical microscope probe stations.